Gigabit ethernet: migrating to high-bandwidth LANs
Gigabit ethernet: migrating to high-bandwidth LANs
Model checking
Formal verification of iterative algorithms in microprocessors
Proceedings of the 37th Annual Design Automation Conference
Validating the intel pentium 4 microprocessor
Proceedings of the 38th annual Design Automation Conference
Verification of an Implementation of Tomasulo's Algorithm by Compositional Model Checking
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Automatic verification of Pipelined Microprocessor Control
CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
Kripke modelling and verification of temporal specifications of a multiple UAV system
Annals of Mathematics and Artificial Intelligence
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We use model checking techniques to verify a switching block in a new Gigabit Ethernet switch - BCM5690. Due to its dynamic nature, this block has been traditionally difficult to verify. Formal techniques are far more efficient than simulation for this particular design. Among 26 design errors discovered, 22 are found using formal methods. We then improve our model checking capability to analyze switch latency. We also use induction to avoid state explosion in the model checker.