Verification: what works and what doesn't

Authors:
Robert Damiano;Bob Bentley;Kurt Baty;Kevin Normoyle;Makoto Ishii;Einat Yogev;Francine Bacchini
Affiliations:
Synopsys, Inc., Hillsboro, OR;Intel Corp.;WSFDB Consulting, Austin, TX;Azul Systems, Inc.;Sony Corp., Osaki Shinagawa-Ku, Japan;Cisco Systems, Inc., San Jose, CA;Thinkbold Corporate Communications, San Jose, CA
Venue:
Proceedings of the 41st annual Design Automation Conference
Year:
2004

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Abstract

Today's leading chip and system companies are faced with ever increasing design verification challenges; industry studies reveal that as much as 50% of the total schedule is being spent in verification. Large companies, with almost infinite resources, have shown that throwing CPU cycles and people at the simulation problem still doesn't guarantee a level of coverage desired by the design team.