ReVive: cost-effective architectural support for rollback recovery in shared-memory multiprocessors
ISCA '02 Proceedings of the 29th annual international symposium on Computer architecture
ISCA '02 Proceedings of the 29th annual international symposium on Computer architecture
Coverage-oriented verification of banias
Proceedings of the 40th annual Design Automation Conference
Microprocessor Entomology: A Taxonomy of Design Faults in COTS Microprocessors
DCCA '99 Proceedings of the conference on Dependable Computing for Critical Applications
The Test and Debug Features of the AMD-K7TM Microprocessor
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Verification: what works and what doesn't
Proceedings of the 41st annual Design Automation Conference
Phoenix: Detecting and Recovering from Permanent Processor Design Bugs with Programmable Hardware
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture
Using Field-Repairable Control Logic to Correct Design Errors in Microprocessors
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Using introspective software-based testing for post-silicon debug and repair
Proceedings of the 47th Design Automation Conference
Parichute: Generalized Turbocode-Based Error Correction for Near-Threshold Caches
MICRO '43 Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture
Releasing efficient beta cores to market early
Proceedings of the 38th annual international symposium on Computer architecture
Accelerating microprocessor silicon validation by exposing ISA diversity
Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture
Quick detection of difficult bugs for effective post-silicon validation
Proceedings of the 49th Annual Design Automation Conference
Overcoming post-silicon validation challenges through quick error detection (QED)
Proceedings of the Conference on Design, Automation and Test in Europe
A survey of checker architectures
ACM Computing Surveys (CSUR)
RowClone: fast and energy-efficient in-DRAM bulk data copy and initialization
Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture
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Higher level of resource integration and the addition of new features in modern multi-processors put a significant pressure on their verification. Although a large amount of resources and time are devoted to the verification phase of modern processors, many design bugs escape the verification process and slip into processors operating in the field. These design bugs often lead to lower quality products, lower customer satisfaction, diminishing brand/company reputation, or even expensive product recalls.