DCAS is not a silver bullet for nonblocking algorithm design

  • Authors:

  • Simon Doherty;David L. Detlefs;Lindsay Groves;Christine H. Flood;Victor Luchangco;Paul A. Martin;Mark Moir;Nir Shavit;Guy L. Steele, Jr.

  • Affiliations:

  • Victoria University of Wellington, Wellington, New Zealand and Sun Microsystems Laboratories, Burlington, MA;Sun Microsystems Laboratories, Burlington, MA;Victoria University of Wellington, Wellington, New Zealand;Sun Microsystems Laboratories, Burlington, MA;Sun Microsystems Laboratories, Burlington, MA;Sun Microsystems Laboratories, Burlington, MA;Sun Microsystems Laboratories, Burlington, MA;Sun Microsystems Laboratories, Burlington, MA;Sun Microsystems Laboratories, Burlington, MA

  • Venue:
  • Proceedings of the sixteenth annual ACM symposium on Parallelism in algorithms and architectures
  • Year:
  • 2004

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Abstract

Despite years of research, the design of efficient nonblocking algorithms remains difficult. A key reason is that current shared-memory multiprocessor architectures support only single-location synchronisation primitives such as compare-and-swap (CAS) and load-linked/store-conditional (LL/SC). Recently researchers have investigated the utility of double-compare-and-swap (DCAS)--a generalisation of CAS that supports atomic access to two memory locations -- in overcoming these problems. We summarise recent research in this direction and present a detailed case study concerning a previously published nonblocking DCAS-based double-ended queue implementation. Our summary and case study clearly show that DCAS does not provide a silver bullet for nonblocking synchronisation. That is, it does not make the design and verification of even mundane nonblocking data structures with desirable properties easy. Therefore, our position is that while slightly more powerful synchronisation primitives can ave a profound effect on ease of algorithm design and verification, DCAS does not provide sufficient additional power over CAS to justify supporting it in hardware.