Technology-migratable ASIC library design
IBM Journal of Research and Development
Transformational placement and synthesis
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Embedded DRAM design and architecture for the IBM 0.11-µm ASIC offering
IBM Journal of Research and Development
Designing mega-ASICs in nanogate technologies
Proceedings of the 40th annual Design Automation Conference
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Bounded potential slack: enabling time budgeting for dual-Vt allocation of hierarchical design
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
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The density and performance of advanced silicon technologies have made system-on-a-chip ASICs possible. SoCs bring together a diverse set of functions and technology features on a single die of enormous complexity. The physical design of these complex ASICs requires a rich set of functional elements that integrate efficiently with a set of design flows and tools productive enough to meet product requirements successfully, without consuming more time or design resources than a simpler design. The architecture described, including functional libraries and physical design conventions, enables the creation of multiple SoC ASIC designs from a common infrastructure that addresses silicon integration, electrical robustness, and packaging challenges. An implementation strategy follows from this design infrastructure that includes hierarchical design concepts, placement, routing, and verification processes.