FSMD functional partitioning for low power
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Code compression for low power embedded system design
Proceedings of the 37th Annual Design Automation Conference
Power-optimal encoding for DRAM address bus (poster session)
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Cached-code compression for energy minimization in embedded processors
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
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Proceedings of the 2002 international symposium on Low power electronics and design
A low power based system partitioning and binding technique for multi-chip module architectures
GLS '97 Proceedings of the 7th Great Lakes Symposium on VLSI
Dynamic Voltage Scaling with Links for Power Optimization of Interconnection Networks
HPCA '03 Proceedings of the 9th International Symposium on High-Performance Computer Architecture
Minimizing Energy Consumption for High-Performance Processing
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Energy efficient system partitioning for distributed wireless sensor networks
ICASSP '01 Proceedings of the Acoustics, Speech, and Signal Processing, 200. on IEEE International Conference - Volume 02
Debugging HW/SW interface for MPSoC: video encoder system design case study
Proceedings of the 41st annual Design Automation Conference
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Transmitting compressed data can reduce inter-processor communicationtraffic and create new opportunities for DVS (dynamicvoltage scaling) in distributed embedded systems. However, datacompression alone may not be effective unless coordinated withfunctional partitioning. This paper presents a dynamic programmingtechnique that combines compression and functional partitioningto minimize energy on multiple voltage-scalable processorsrunning pipelined data-regular applications under performance constraints.Our algorithm computes the optimal functional partitioning,CPU speed for each node, and their respective compression ratios.We validate the algorithm's effectiveness on a real distributedembedded system running an image processing algorithm.