An On-Line Algorithm for Checkpoint Placement
IEEE Transactions on Computers
Voltage scheduling problem for dynamically variable voltage processors
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Analysis of Checkpointing for Real-Time Systems
Real-Time Systems
Energy efficient fixed-priority scheduling for real-time systems on variable voltage processors
Proceedings of the 38th annual Design Automation Conference
Energy-Aware Adaptive Checkpointing in Embedded Real-Time Systems
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Task Feasibility Analysis and Dynamic Voltage Scaling in Fault-Tolerant Real-Time Embedded Systems
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Online task-scheduling for fault-tolerant low-energy real-time systems
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Energy management for real-time embedded systems with reliability requirements
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Exact Fault-Sensitive Feasibility Analysis of Real-Time Tasks
IEEE Transactions on Computers
Power saving and fault-tolerance in real-time critical embedded systems
Journal of Systems Architecture: the EUROMICRO Journal
Reliability-aware dynamic energy management in dependable embedded real-time systems
ACM Transactions on Embedded Computing Systems (TECS)
Journal of Computer and System Sciences
An analytical method for reliability aware instruction set extension
The Journal of Supercomputing
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We investigate an integrated approach to fault tolerance anddynamic power management in real-time embedded systems. Faulttolerance is achieved via checkpointing and power management iscarried out using dynamic voltage scaling (DVS). We presentfeasibility-of-scheduling tests for checkpointing schemes for aconstant processor speed as well as for variable processor speeds.DVS is then carried out on the basis of these feasibility analyses.Experimental results show that compared to fault-obliviousmethods, the proposed approach significantly reduces powerconsumption and guarantees timely task completion in the presence of faults.