Precomputation-based sequential logic optimization for low power
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
Retiming sequential circuits for low power
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
A bipartition-codec architecture to reduce power in pipelined circuits
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Automating RT-level operand isolation to minimize power consumption in datapaths
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
Guarded evaluation: pushing power management to logic synthesis/design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A bipartition-codec architecture to reduce power in pipelined circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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In this article, we present a bipartition dual-encoding architecture for low-power pipelined circuits. We exploit the bipartition approach as well as encoding techniques to reduce power dissipation not only of combinational logic blocks but also of the pipeline registers. Based on Shannon expansion, we partition a given circuit into two subcircuits such that the number of different outputs of both subcircuits are reduced, and then encode the output of both subcircuits to minimize the Hamming distance for transitions with a high switching probability. We measure the benefits of four different combinational bipartitioning and encoding architectures for comparison. The transistor-level simulation results show that bipartition dual-encoding can effectively reduce power by 72.7&percent; for the pipeline registers and 27.1&percent; for the total power consumption on average. To the best of our knowledge, it is the first work that presents an in-depth study on bipartition and encoding techniques to optimize power for pipelined circuits.