On characterization of catastrophic faults in two-dimensional VLSI arrays

  • Authors:
  • Soumen Maity;Amiya Nayak;Bimal K. Roy

  • Affiliations:
  • Department of Mathematics, Indian Institute of Technology, Guwahati 781 039, Assam, India;School of Information Technology and Engineering, University of Ottawa, 800 King Edward Avenue, Ottawa, ON, K1N 6N5, Canada;Applied Statistics Unit, Indian Statistical Institute, 203 B.T. Road, Calcutta 700 108, India

  • Venue:
  • Integration, the VLSI Journal
  • Year:
  • 2004

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Abstract

The catastrophic fault pattern (CFP) is a pattern of faults occurring at strategic locations that may render a system unusable regardless of its component redundancy and of its reconfiguration capabilities. In this paper, we extend the characterization of catastrophic fault patterns known for linear arrays to two-dimensional VLSI arrays in which all links are bidirectional. We determine the minimum number of faults required for a fault pattern to be catastrophic. The width of a fault pattern must fall within precise bounds for the pattern to be catastrophic. We outline an algorithm for the construction of a CFP with the maximum width for a given link redundancy. This algorithm gives us the framework for achieving specific upper and exact bounds on the width of CFP for a given link configuration. We give necessary and sufficient conditions for a fault pattern to be catastrophic with respect to a link redundancy. Finally we provide an algorithm to test whether a given fault pattern is catastrophic with respect to a link redundancy.