High Speed Max-Log-MAP Turbo SISO Decoder Implementation Using Branch Metric Normalization

Authors:
J. H. Han;A. T. Erdogan;T. Arslan
Affiliations:
University of Edinburgh;University of Edinburgh and Institute of System Level Integration;University of Edinburgh and Institute of System Level Integration
Venue:
ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
Year:
2005

Citing 6
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Abstract

The authors present a turbo soft-in soft-out (SISO) decoder based on Max-Log maximum a posteriori (ML-MAP) algorithm implemented with sliding window (SW) method. A novel technique based on branch metric normalization is introduced to improve the speed performance of the decoder. The turbo decoder with the proposed technique has been synthesized to evaluate its power consumption and area usage using a 0.18um standard CMOS cell library. It is shown that while power consumption and area usage change slightly with our technique, it achieves up to 58% speed-up compared to a conventional SISO decoder architecture.