Communicating sequential processes
Communicating sequential processes
Validation of ultrahigh dependability for software-based systems
Communications of the ACM
A refinement calculus for the synthesis of verified hardware descriptions in VHDL
ACM Transactions on Programming Languages and Systems (TOPLAS)
Proof, language, and interaction
Ella 2000: A Language for Electronic System Design
Ella 2000: A Language for Electronic System Design
IEEE Standards Intepretations: IEEE Std 1076-1987, IEEE Standard VHDL Language Reference Manual
IEEE Standards Intepretations: IEEE Std 1076-1987, IEEE Standard VHDL Language Reference Manual
Hardware implementation of the Ravenscar Ada tasking profile
CASES '02 Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems
FPL '98 Proceedings of the 8th International Workshop on Field-Programmable Logic and Applications, From FPGAs to Computing Paradigm
Incremental Development of a High Integrity Compiler: Experience from an Industrial Development
HASE '98 The 3rd IEEE International Symposium on High-Assurance Systems Engineering
JVX - A Rapid Prototyping System Based on Java and FPGAs
FPL '98 Proceedings of the 8th International Workshop on Field-Programmable Logic and Applications, From FPGAs to Computing Paradigm
Pebble: A Language for Parametrised and Reconfigurable Hardware Design
FPL '98 Proceedings of the 8th International Workshop on Field-Programmable Logic and Applications, From FPGAs to Computing Paradigm
High level formal verification of next-generation microprocessors
Proceedings of the 40th annual Design Automation Conference
ACSD '03 Proceedings of the Third International Conference on Application of Concurrency to System Design
Hardware Implementation of Programming Languages for Real-Time
RTAS '02 Proceedings of the Eighth IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'02)
High Integrity Software: The SPARK Approach to Safety and Security
High Integrity Software: The SPARK Approach to Safety and Security
SPARK: A High-Lev l Synthesis Framework For Applying Parallelizing Compiler Transformations
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Occam Programming Manual
Enabling certification for dynamic partial reconfiguration using a minimal flow
Proceedings of the conference on Design, automation and test in Europe
Towards normal design for safety-critical systems
FASE'07 Proceedings of the 10th international conference on Fundamental approaches to software engineering
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Understanding the roles that rigour and formality can have in the design of critical systems is critical to anyone wishing to contribute to their development. Whereas knowledge of these issues is good in software development, in the use of hardware -- specifically programmable logic devices (PLDs) and the combination of PLDs and software -- the issues are less well known. Indeed, even in industry there are many differences between current and recommended practice and engineering opinion differs on how to apply existing standards. This situation has led to gaps in the formal and rigorous treatment of PLDs in critical systems.In this paper we examine the range of and potential for formal specification and analysis techniques that address the requirements for verifiable PLD programs. We identify existing formalisms that may be used, and lay out the areas of contributions that academia and industry in collaboration can make that would allow high-integrity PLD programming to be as practicable as high-integrity software development.This paper also touches briefly on some important practical, technical, organisational, social, and psychological aspects of the introduction of formal methods into industrial practice for hardware and system design. It also provides an update and summary of the recent UK Defence Standard 00-56, as it relates to hardware.