On switch factor based analysis of coupled RC interconnects
Proceedings of the 37th Annual Design Automation Conference
Coding Scheme for Low Energy Consumption Fault-Tolerant Bus
IOLTW '02 Proceedings of the Proceedings of The Eighth IEEE International On-Line Testing Workshop (IOLTW'02)
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low power
Exploiting ECC Redundancy to Minimize Crosstalk Impact
IEEE Design & Test
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Journal of Electronic Testing: Theory and Applications
Power consumption of fault tolerant busses
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A data capturing method for buses on chip
IEEE Transactions on Circuits and Systems Part I: Regular Papers
Scalable codeword generation for coupled buses
Proceedings of the Conference on Design, Automation and Test in Europe
Crosstalk-aware channel coding schemes for energy efficient and reliable NOC interconnects
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A reliable and power efficient flow-control method to eliminate crosstalk faults in network-on-chips
Microprocessors & Microsystems
International Journal of Computer Applications in Technology
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Signal integrity in high-speed bus designs is put at risk by crosstalk-related bus delays. This article provides a comprehensive study of the usefulness of error-correcting code (ECC) redundancy in reducing such delays. It shows that Dual Rail codes perform better at this task than Hamming codes.