Statecharts: A visual formalism for complex systems
Science of Computer Programming
Test program generation for functional verification of PowerPC processors in IBM
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Interacting processes: a multiparty approach to coordinated distributed programming
Interacting processes: a multiparty approach to coordinated distributed programming
Writing testbenches: functional verification of HDL models
Writing testbenches: functional verification of HDL models
Art of Verification with VERA
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
X-Gen: a random test-case generator for systems and SoCs
HLDVT '02 Proceedings of the Seventh IEEE International High-Level Design Validation and Test Workshop
EUC'06 Proceedings of the 2006 international conference on Embedded and Ubiquitous Computing
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We present a methodology for scheduling system-level transactions generated by a test-case generator. A system, in this context, may be composed of multiple processors, busses, bus-bridges, memories, etc. The methodology is based on an exploration of scheduling abilities in a hardware system. In its focus is a language for specifying transactions and their ordering. Through the use of hierarchy, the language provides the possibility of applying high-level scheduling requests. The methodology is realized in X-Gen, a system-level test-case generator used in IBM. The model and algorithm used by this tool are also discussed.