Trends in Testing Integrated Circuits

Authors:
Bart Vermeulen;Camelia Hora;Bram Kruseman;Erik Jan Marinissen;Robert Van Rijsinge
Affiliations:
Philips Research Laboratories, Netherlands;Philips Research Laboratories, Netherlands;Philips Research Laboratories, Netherlands;Philips Research Laboratories, Netherlands;Philips Semiconductors - ATO, Nijmegen, Netherlands
Venue:
ITC '04 Proceedings of the International Test Conference on International Test Conference
Year:
2004

Citing 0
Cited 4

Scan Test Response Compaction Combined with Diagnosis Capabilities

Journal of Electronic Testing: Theory and Applications
Deviation-based LFSR reseeding for test-data compression

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Fully X-tolerant, very high scan compression

Proceedings of the 47th Design Automation Conference
Experimental Results for Slow-speed Timing Characterization of High-speed Pipelined Datapaths

Journal of Electronic Testing: Theory and Applications

Quantified Score

Hi-index	0.00

Visualization

Abstract

New process technologies, increased design complexity, and more stringent customer quality requirements drive the need for better test quality, improved test program development, and faster ramp-up at overall lower product cost. In this paper we describe the main industry test trends and recent innovations in testing integrated circuits as they are applied within Philips.