IEEE Transactions on Computers - Special issue on fault-tolerant computing
Test Data Decompression for Multiple Scan Designs with Boundary Scan
IEEE Transactions on Computers
Seed encoding with LFSRs and cellular automata
Proceedings of the 40th annual Design Automation Conference
Exact Computation of Maximally Dominating Faults and Its Application to n-Detection Tests
ATS '02 Proceedings of the 11th Asian Test Symposium
Efficient Seed Utilization for Reseeding based Compression
VTS '03 Proceedings of the 21st IEEE VLSI Test Symposium
BIST RESEEDING WITH VERY FEW SEEDS
VTS '03 Proceedings of the 21st IEEE VLSI Test Symposium
A MIXED MODE BIST SCHEME BASED ON RESEEDING OF FOLDING COUNTERS
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Reducing Test Dat Volume Using LFSR Reseeding with Seed Compression
ITC '02 Proceedings of the 2002 IEEE International Test Conference
Adjustable Width Linear Combinational Scan Vector Decompression
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
TranGen: a SAT-based ATPG for path-oriented transition faults
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Achieving high encoding efficiency with partial dynamic LFSR reseeding
ACM Transactions on Design Automation of Electronic Systems (TODAES)
An Economic Analysis and ROI Model for Nanometer Test
ITC '04 Proceedings of the International Test Conference on International Test Conference
Trends in Testing Integrated Circuits
ITC '04 Proceedings of the International Test Conference on International Test Conference
On N-Detect Pattern Set Optimization
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
ATS '06 Proceedings of the 15th Asian Test Symposium
A Seed-Selection Method to Increase Defect Coverage for LFSR-Reseeding-Based Test Compression
ETS '07 Proceedings of the 12th IEEE European Test Symposium
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Multiphase BIST: a new reseeding technique for high test-data compression
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Increasing encoding efficiency of LFSR reseeding-based test compression
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Test-Quality/Cost Optimization Using Output-Deviation-Based Reordering of Test Patterns
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
RTL DFT Techniques to Enhance Defect Coverage for Functional Test Sequences
Journal of Electronic Testing: Theory and Applications
Journal of Electronic Testing: Theory and Applications
Functional test-sequence grading at register-transfer level
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Linear feedback shift register (LFSR) reseeding forms the basis for many test-compression solutions. A seed can be computed for each test cube by solving a system of linear equations based on the feedback polynomial of the LFSR. Despite the availability of numerous LFSR-reseeding-based compression methods in the literature, relatively little is known about the effectiveness of these seeds for unmodeled defects, particularly since there are often several candidate seeds for a test cube. We use the recently proposed output deviation measure of the resulting patterns as a metric to select appropriate LFSR seeds. Experimental results are reported using test patterns for stuck-at and transition faults derived from selected seeds for the ISCAS-89 and the IWLS-05 benchmark circuits. These patterns achieve higher coverage for transition and stuck-open faults than patterns obtained using other seed-generation methods for LFSR reseeding. Given a pattern pair (p1, p2) for transition faults, we also examine the transition-fault coverage for launch on capture by using p1 and p2 to separately compute output deviations. Results show that p1 tends to be better when there is a high proportion of do-not-care bits in the test cubes, while p2 is a more appropriate choice when the transition-fault coverage is high.