Linear Dependencies in Linear Feedback Shift Registers
IEEE Transactions on Computers
IEEE Transactions on Computers - Special issue on fault-tolerant computing
Pattern generation for a deterministic BIST scheme
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Test Data Decompression for Multiple Scan Designs with Boundary Scan
IEEE Transactions on Computers
Test volume and application time reduction through scan chain concealment
Proceedings of the 38th annual Design Automation Conference
Two-Dimensional Test Data Decompressor for Multiple Scan Designs
Proceedings of the IEEE International Test Conference on Test and Design Validity
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
OPMISR: the foundation for compressed ATPG vectors
Proceedings of the IEEE International Test Conference 2001
Test vector encoding using partial LFSR reseeding
Proceedings of the IEEE International Test Conference 2001
Automated synthesis of large phase shifters for built-in self-test
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Embedded Deterministic Test for Low-Cost Manufacturing Test
ITC '02 Proceedings of the 2002 IEEE International Test Conference
Reducing Test Dat Volume Using LFSR Reseeding with Seed Compression
ITC '02 Proceedings of the 2002 IEEE International Test Conference
A SmartBIST Variant with Guaranteed Encoding
ATS '01 Proceedings of the 10th Asian Test Symposium
Decompression of test data using variable-length seed LFSRs
VTS '95 Proceedings of the 13th IEEE VLSI Test Symposium
Test data compression scheme based on variable-to-fixed-plus-variable-length coding
Journal of Systems Architecture: the EUROMICRO Journal
Investigating some special sequence lengths generated in an external exclusive-NOR type LFSR
Computers and Electrical Engineering
Deviation-based LFSR reseeding for test-data compression
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Seed selection in LFSR-reseeding-based test compression for the detection of small-delay defects
Proceedings of the Conference on Design, Automation and Test in Europe
Test-data volume and scan-power reduction with low ATE interface for multi-core SoCs
Proceedings of the International Conference on Computer-Aided Design
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Previous forms of LFSR reseeding have been static (i.e., test application is stopped while each seed is loaded) and have required full reseeding (i.e., the length of the seed is equal to the length of the LFSR). A new form of LFSR reseeding is described here that is dynamic (i.e., the seed is incrementally modified while test application proceeds) and allows partial reseeding (i.e. length of the seed is less than that of the LFSR). In addition to providing better encoding efficiency, partial dynamic LFSR reseeding has a simpler hardware implementation than previous schemes based on multiple-polynomial LFSRs.