Test volume and application time reduction through scan chain concealment

  • Authors:
  • Ismet Bayraktaroglu;Alex Orailoglu

  • Affiliations:
  • Computer Science & Engineering Department, University of California, San Diego, La Jolla, CA;Computer Science & Engineering Department, University of California, San Diego, La Jolla, CA

  • Venue:
  • Proceedings of the 38th annual Design Automation Conference
  • Year:
  • 2001

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Abstract

A test pattern compression scheme is proposed in order to reduce test data volume and application time. The number of scan chains that can be supported by an ATE is significantly increased by utilizing an on-chip decompressor. The functionality of the ATE is kept intact by moving the decompression task to the circuit under test. While the number of virtual scan chains visible to the ATE is kept small, the number of internal scan chains driven by the decompressed pattern sequence can be sinificantly increased.