Elimination of Traditional Functional Testing of Interface Timings at Intel

Authors:
Mike Tripp;T. M. Mak;Anne Meixner
Affiliations:
Intel Corporation;Intel Corporation;Intel Corporation
Venue:
ITC '04 Proceedings of the International Test Conference on International Test Conference
Year:
2004

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Abstract

This paper summarizes the Design for Test (DFT) circuitry and test methods that enabled Intel to shift away from traditional functional testing of I/O's. This shift was one of the key enablers for Automatic Test Equipment (ATE) re-use and the move to lower capability (& cost) structural test platforms. Specific examples include circuit implementations from the Pentium® 4 processor, High Volume Manufacturing (HVM) data, and evolutionary changes to address key learnings. We close with indications of how this can be extended to cover the next generation High Speed Serial like interfaces.