IEEE standard 1500 compatible interconnect diagnosis for delay and crosstalk faults

Authors:
Katherine Shu-Min Li;Yao-Wen Chang;Chauchin Su;Chung-Len Lee;Jwu E Chen
Affiliations:
National Chiao Tung University, Hsichu, Taiwan;National Taiwan University, Taipei, Taiwan;National Chiao Tung University, Hsichu, Taiwan;National Chiao Tung University, Hsichu, Taiwan;National Central University, Chungli, Taiwan
Venue:
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Year:
2006

Citing 7
Cited 0

Structural diagnosis of interconnects by coloring

ACM Transactions on Design Automation of Electronic Systems (TODAES)
Maximal Diagnosis for Wiring Networks

Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
Minimizing Pattern Count for Interconnect Test under a Ground Bounce Constraint

IEEE Design & Test
Oscillation-test strategy for analog and mixed-signal integrated circuits

VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
Testing SoC Interconnects for Signal Integrity Using Boundary Scan

VTS '03 Proceedings of the 21st IEEE VLSI Test Symposium
A new maximal diagnosis algorithm for interconnect test

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Oscillation ring based interconnect test scheme for SOC

Proceedings of the 2005 Asia and South Pacific Design Automation Conference

Quantified Score

Hi-index	0.00

Visualization

Abstract

We propose an interconnect diagnosis scheme based on Oscillation Ring test methodology for SOC design with heterogeneous cores. The target fault models are delay faults and crosstalk glitches. We analyze the diagnosability of an interconnect structure and propose a fast diagnosability checking algorithm and an efficient diagnosis ring generation algorithm which achieves the optimal diagnosability. Two optimization techniques improve the efficiency and effectiveness of interconnect diagnosis. In all experiments, our method achieves 100% fault coverage and the optimal diagnosis resolution.