Oscillation ring based interconnect test scheme for SOC

  • Authors:
  • Katherine Shu-Min Li;Chung Len Lee;Chauchin Su;Jwu E Chen

  • Affiliations:
  • National Chiao Tung Univ., Hsinchu, Taiwan, ROC;National Chiao Tung Univ., Hsinchu, Taiwan, ROC;National Chiao Tung Univ., Hsinchu, Taiwan, ROC;National Central University Chungli, Taiwan, ROC

  • Venue:
  • Proceedings of the 2005 Asia and South Pacific Design Automation Conference
  • Year:
  • 2005

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Abstract

We propose a novel oscillation ring (OR) test architecture for testing interconnects in SoC. In addition to stuck-at and open faults, this scheme can detect delay faults and crosstalk glitches. IEEE P1500 wrapper cells are modified. An efficient ring-generation algorithm is proposed to construct ORs based on a graph model. Experimental results on MCNC benchmark circuits show the feasibility of the scheme and the effectiveness of the algorithm. Our method achieves 100% fault coverage with a small number of tests.