Oscillation Ring Delay Test for High Performance Microprocessors

Authors:
Wen Ching Wu;Chung Len Lee;Ming Shae Wu;Jwu E. Chen;Magdy S. Abadir
Affiliations:
Department of Electronics Engineering, National Chiao Tung University, Hsin Chu, Taiwan, ROC. cllee@cc.nctu.edu.tw;Department of Electronics Engineering, National Chiao Tung University, Hsin Chu, Taiwan, ROC;Department of Electronics Engineering, National Chiao Tung University, Hsin Chu, Taiwan, ROC;Department of Electrical Engineering, Chung Hwa University, Hsin Chu, Taiwan, ROC;Somerset Design Center, Motorola Inc., Austin, TX, USA
Venue:
Journal of Electronic Testing: Theory and Applications - Special issue on microprocessor test and verification
Year:
2000

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Abstract

This paper proposes a new test scheme, oscillation ringtest, and its associated test circuit organization for delay faulttesting for high performance microprocessors. For this test scheme,the outputs of the circuit under test are connected to its inputs toform oscillation rings and test vectors which sensitize circuit pathsare sought to make the rings oscillate. High speed transitioncounters or oscillation detectors can then be used to detect whetherthe circuit is working normally or not. The sensitizable paths ofoscillation rings cover all circuit lines, detecting all gate delayfaults, a large part of hazard free robust path delay faults and allthe stuck-at faults. It has the advantage of testing the circuit atthe working speed of the circuit. Also, with some modification, thescheme can also be used to measure the maximum speed of the circuit.The scheme needs minimal simple added hardware, thus ideal fortesting, embedded circuits and microprocessors.