Design and analysis of a delay sensor applicable to process/environmental variations and aging measurements

Authors:
Xiaoxiao Wang;Mohammad Tehranipoor;Saji George;Dat Tran;LeRoy Winemberg
Affiliations:
Electrical and Computer Engineering Department, University of Connecticut, Storrs, CT;Electrical and Computer Engineering Department, University of Connecticut, Storrs, CT;Freescale Semiconductor, Austin, TX;Freescale Semiconductor, Austin, TX;Freescale Semiconductor, Austin, TX
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2012

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Abstract

With technology scaling, the deviation between predicted path delay using simulation and actual path delay on silicon increases due to process variation and aging. Hence, on-chip measurement architectures are now widely used due to their higher accuracy and lower cost compared to using external expensive measurement devices. In this paper, a novel path-delay measurement architecture called path-based ring oscillator (Path-RO) which takes into account variations is proposed. Path-RO can perform accurate on-chip path-delay measurement with nearly no impact on functional data path. At the same time, process variations will not affect the measurement accuracy. The accuracy degradation due to aging is also negligible, which enables Path-RO to monitor path delay throughout aging process. This delay sensor is perfectly suitable for fast and accurate speed binning as well. By targeting speed paths, the speed of chip can be binned efficiently even in presence of clock skew. Various simulation results collected by Path-RO inserted into b19 circuit demonstrate its high accuracy and efficiency.