Low-power techniques for network security processors

  • Authors:
  • Yi-Ping You;Chun-Yen Tseng;Yu-Hui Huang;Po-Chiun Huang;TingTing Hwang;Sheng-Yu Hsu

  • Affiliations:
  • National Tsing Hua University, Hsinchu, Taiwan;National Tsing Hua University, Hsinchu, Taiwan;National Tsing Hua University, Hsinchu, Taiwan;National Tsing Hua University, Hsinchu, Taiwan;National Tsing Hua University, Hsinchu, Taiwan;Industrual Technology Research Insitude, Hsinchu, Taiwan

  • Venue:
  • Proceedings of the 2005 Asia and South Pacific Design Automation Conference
  • Year:
  • 2005

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Abstract

In this paper, we present several techniques for low-power design, including a descriptor-based low-power scheduling algorithm, design of dynamic voltage generator, and dual threshold voltage assignments, for network security processors. The experiments show that the proposed methods and designs provide the opportunity for network security processors to achieve the goals of both high performance and low power.