Response surfaces: designs and analyses
Response surfaces: designs and analyses
Feasibility and performance region modeling of analog and digital circuits
Analog Integrated Circuits and Signal Processing - Special issue: modeling and simulation of mixed analog-digital systems
Shape transformation using variational implicit functions
Proceedings of the 26th annual conference on Computer graphics and interactive techniques
Remembrance of circuits past: macromodeling by data mining in large analog design spaces
Proceedings of the 39th annual Design Automation Conference
Hierarchical symbolic analysis of analog integrated circuits via determinant decision diagrams
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Optimal design of a CMOS op-amp via geometric programming
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Circuit simplification for the symbolic analysis of analog integrated circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Extraction and use of neural network models in automated synthesis of operational amplifiers
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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In this paper, we present an error-driven adaptive sampling algorithm called adaptive grid refinement (AGR) algorithm to automatically generate performance macromodels for analog circuits. Starting from samples on a coarse grid, the AGR algorithm builds a global model and validates its accuracy on an independent validation data set sampled within this grid. If this model is not accurate enough on the validation data, the grid is split into equal sized smaller grids. On each of these grids, a local model is built using samples on this grid and its neighboring and validated similarly. A grid will not be further refined only if the corresponding local model is accurate on its validation data set. The algorithm will stop when all the local models are accurate on their corresponding validation data set. We build six performance macromodels of a CMOS opamp using the AGR algorithm and compare it with the competing techniques. The strengths and weaknesses of the proposed algorithm are discussed.