System-level process variability compensation on memory organizations of dynamic applications: a case study

Authors:
C. Sanz;M. Prieto;A. Papanikolaou;M. Miranda;F. Catthoor
Affiliations:
Universidad Complutense, 28040 Madrid, Spain;Universidad Complutense, Madrid, Spain;IMEC v.z.w, Leuven, Belgium;IMEC v.z.w, Leuven, Belgium;IMEC v.z.w, Leuven, Belgium
Venue:
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Year:
2006

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Abstract

Process variability and the dynamism of new applications have a tremendous impact on both the performance and the energy consumption of memory organizations of embedded systems. In this paper, we explore the combination of code transformations at compilation time and architectural-level techniques to tackle both problems, introducing a new methodology to combine them in an integrated and coordinated way. Our approach manages to reduce significantly the energy overhead associated to both variability and application dynamism (up to 50% according to our simulations) without compromising the application timing constraints.