Managing dynamic concurrent tasks in embedded real-time multimedia systems
Proceedings of the 15th international symposium on System Synthesis
Scenario-based software characterization as a contingency to traditional program profiling
CASES '02 Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems
Energy management for real-time embedded applications with compiler support
Proceedings of the 2003 ACM SIGPLAN conference on Language, compiler, and tool for embedded systems
The design, implementation, and evaluation of a compiler algorithm for CPU energy reduction
PLDI '03 Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation
Collaborative Operating System and Compiler Power Management for Real-Time Applications
RTAS '03 Proceedings of the The 9th IEEE Real-Time and Embedded Technology and Applications Symposium
Pareto-optimization-based run-time task scheduling for embedded systems
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
A Dynamic Voltage Scaling Algorithm for Sporadic Tasks
RTSS '03 Proceedings of the 24th IEEE International Real-Time Systems Symposium
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Combining compiler and runtime IPC predictions to reduce energy in next generation architectures
Proceedings of the 1st conference on Computing frontiers
Profile-based optimal intra-task voltage scheduling for hard real-time applications
Proceedings of the 41st annual Design Automation Conference
Power-aware compilation for register file energy reduction
International Journal of Parallel Programming - Special issue: Workshop on application specific processors (WASP)
Register Packing: Exploiting Narrow-Width Operands for Reducing Register File Pressure
Proceedings of the 37th annual IEEE/ACM International Symposium on Microarchitecture
Intra-task scenario-aware voltage scheduling
Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems
Power reduction techniques for microprocessor systems
ACM Computing Surveys (CSUR)
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Collaborative operating system and compiler power management for real-time applications
ACM Transactions on Embedded Computing Systems (TECS)
Bypass aware instruction scheduling for register file power reduction
Proceedings of the 2006 ACM SIGPLAN/SIGBED conference on Language, compilers, and tool support for embedded systems
Leakage-aware intraprogram voltage scaling for embedded processors
Proceedings of the 43rd annual Design Automation Conference
Proceedings of the 15th international conference on Parallel architectures and compilation techniques
Selective writeback: exploiting transient values for energy-efficiency and performance
Proceedings of the 2006 international symposium on Low power electronics and design
Runtime distribution-aware dynamic voltage scaling
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Efficient and scalable compiler-directed energy optimization for realtime applications
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Dynamic voltage frequency scaling for multi-tasking systems using online learning
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
The Journal of Supercomputing
IEEE Transactions on Computers
Combining system scenarios and configurable memories to tolerate unpredictability
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Dynamic voltage scaling of supply and body bias exploiting software runtime distribution
Proceedings of the conference on Design, automation and test in Europe
Static analysis of processor stall cycle aggregation
CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
Selective writeback: reducing register file pressure and energy consumption
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Toward the optimal configuration of dynamic voltage scaling points in real-time applications
Journal of Computer Science and Technology
Efficient dynamic voltage/frequency scaling through algorithmic loop transformation
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
A DVS-based pipelined reconfigurable instruction memory
Proceedings of the 46th Annual Design Automation Conference
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
System-level power management using online learning
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A dynamic frequency scaling solution to DPM in embedded linux systems
IRI'09 Proceedings of the 10th IEEE international conference on Information Reuse & Integration
Dynamic workload peak detection for slack management
SOC'09 Proceedings of the 11th international conference on System-on-chip
Compiler-directed dynamic voltage scaling using program phases
HiPC'07 Proceedings of the 14th international conference on High performance computing
Run-time Task Overlapping on Multiprocessor Platforms
Journal of Signal Processing Systems
Analysis of dynamic voltage scaling for system level energy management
HotPower'08 Proceedings of the 2008 conference on Power aware computing and systems
Automating energy optimization with features
FOSD '10 Proceedings of the 2nd International Workshop on Feature-Oriented Software Development
Program phase and runtime distribution-aware online DVFS for combined Vdd/Vbb scaling
Proceedings of the Conference on Design, Automation and Test in Europe
Power-aware temporal isolation with variable-bandwidth servers
EMSOFT '10 Proceedings of the tenth ACM international conference on Embedded software
Compiler-assisted power optimization for clustered VLIW architectures
Parallel Computing
Saving register-file static power by monitoring instruction sequence in ROB
Journal of Systems Architecture: the EUROMICRO Journal
Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design
Static WCET analysis based compiler-directed DVS energy optimization in real-time applications
ACSAC'06 Proceedings of the 11th Asia-Pacific conference on Advances in Computer Systems Architecture
The optimal profile-guided greedy dynamic voltage scaling in real-time applications
ICESS'05 Proceedings of the Second international conference on Embedded Software and Systems
Identifying the optimal energy-efficient operating points of parallel workloads
Proceedings of the International Conference on Computer-Aided Design
An efficient frequency scaling approach for energy-aware embedded real-time systems
ARCS'05 Proceedings of the 18th international conference on Architecture of Computing Systems conference on Systems Aspects in Organic and Pervasive Computing
Pack & Cap: adaptive DVFS and thread packing under power caps
Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture
Effective dynamic voltage scaling through CPU-Boundedness detection
PACS'04 Proceedings of the 4th international conference on Power-Aware Computer Systems
PICA: Processor Idle Cycle Aggregation for Energy-Efficient Embedded Systems
ACM Transactions on Embedded Computing Systems (TECS)
Evaluation of Low-Power Computing when Operating on Subsets of Multicore Processors
Journal of Signal Processing Systems
Low power wide gates for modern power efficient processors
Integration, the VLSI Journal
Low-power scheduling with DVFS for common RTOS on multicore platforms
ACM SIGBED Review - Special Issue on the 3rd Embedded Operating System Workshop (EWiLi 2013)
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Dynamic voltage scaling (DVS) is a known effectivemechanism for reducing CPU energy consumption withoutsignificant performance degradation. While a lot of workhas been done on inter-task scheduling algorithms to implementDVS under operating system control, new researchchallenges exist in intra-task DVS techniques under softwareand compiler control. In this paper we introduce anovel intra-task DVS technique under compiler control usingprogram checkpoints. Checkpoints are generated atcompile time and indicate places in the code where the processorspeed and voltage should be re-calculated. Check-pointsalso carry user-defined time constraints. Our techniquehandles multiple intra-task performance deadlinesand modulates power consumption according to a run-timepower budget. We experimented with two heuristics for adjustingthe clock frequency and voltage. For the particularbenchmark studied, one heuristic yielded 63% more energysavings than the other. With the best of the heuristics we designed,our technique resulted in 82% energy savings overthe execution of the program without employing DVS.