Lens aberration aware timing-driven placement

Authors:
Andrew B. Kahng;Chul-Hong Park;Puneet Sharma;Qinke Wang
Affiliations:
University of California at San Diego;University of California at San Diego;University of California at San Diego;University of California at San Diego
Venue:
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Year:
2006

Citing 8
Cited 5

Impact of lens aberrations on optical lithography

IBM Journal of Research and Development - Special issue: optical lithography I
Implementation and extensibility of an analytic placer

Proceedings of the 2004 international symposium on Physical design
APlace: a general analytic placement framework

Proceedings of the 2005 international symposium on Physical design
Power-aware placement

Proceedings of the 42nd annual Design Automation Conference
Supply Voltage Degradation Aware Analytical Placement

ICCD '05 Proceedings of the 2005 International Conference on Computer Design
An analytic placer for mixed-size placement and timing-driven placement

Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Architecture and details of a high quality, large-scale analytical placer

ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Implementation and extensibility of an analytic placer

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

A faster implementation of APlace

Proceedings of the 2006 international symposium on Physical design
Synergistic physical synthesis for manufacturability and variability in 45nm designs and beyond

Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Spatial correlation extraction via random field simulation and production chip performance regression

Proceedings of the conference on Design, automation and test in Europe
Lens aberration aware placement for timing yield

ACM Transactions on Design Automation of Electronic Systems (TODAES)
Adapting Application Mapping to Systematic Within-Die Process Variations on Chip Multiprocessors

HiPEAC '09 Proceedings of the 4th International Conference on High Performance Embedded Architectures and Compilers

Quantified Score

Hi-index	0.00

Visualization

Abstract

Process variations due to lens aberrations are to a large extent systematic, and can be modeled for purposes of analyses and optimizations in the design phase. Traditionally, variations induced by lens aberrations have been considered random due to their small extent. However, as process margins reduce, and as improvements in reticle enhancement techniques control variations due to other sources with increased efficacy, lens aberration-induced variations gain importance. For example, our experiments indicate that lens aberration can result in up to 8% variation in cell delay. In this paper, we propose an aberration-aware timing-driven analytical placement approach that accounts for aberration-induced variations during placement. Our approach minimizes the design's cycle time and prevents hold-time violations under systematic aberration-induced variations. On average, the proposed placement technique reduces cycle time by ~ 5% at the cost of ~ 2% increase in wirelength.