An Iterative Algorithm and Low Complexity Hardware Architecture for Fast Acquisition of Long PN Codes in UWB Systems

  • Authors:
  • On Wa Yeung;Keith M. Chugg

  • Affiliations:
  • Department of Electrical Engineering, Viterbi School of Engineering, Communication Science Institute, University of Southern California, Los Angeles 90089-2565;Department of Electrical Engineering, Viterbi School of Engineering, Communication Science Institute, University of Southern California, Los Angeles 90089-2565

  • Venue:
  • Journal of VLSI Signal Processing Systems
  • Year:
  • 2006

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Abstract

Rapidly acquiring the code phase of the spreading sequence in an ultra-wideband system is a very difficult problem. In this paper, we present a new iterative algorithm and its hardware architecture in detail. Our algorithm is based on running iterative message passing algorithms on a standard graphical model augmented with multiple redundant models. Simulation results show that our new algorithm operates at lower signal to noise ratio than earlier works using iterative message passing algorithms. We also demonstrate an efficient hardware architecture for implementing the new algorithm. Specifically, the redundant models can be combined together so that substantial memory usage can be reduced. Our prototype achieves the cost-speed product unachievable by traditional approaches.