Energy efficient data transfer and storage organization for a MAP turbo decoder module
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Finite Wordlength Analysis and Adaptive Decoding for Turbo/MAP Decoders
Journal of VLSI Signal Processing Systems - Special issue on signal processing systems design and implementation
Architectural strategies for low-power VLSI turbo decoders
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Wireless Personal Communications: An International Journal
Low complexity receiver structures for space-time coded multiple-access systems
EURASIP Journal on Applied Signal Processing - Space-time coding and its applications - part I
A low-power VLSI architecture for turbo decoding
Proceedings of the 2003 international symposium on Low power electronics and design
VLSI architectures for SISO-APP decoders
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Energy Efficient VLSI Architecture for Linear Turbo Equalizer
Journal of VLSI Signal Processing Systems
Reduced-Complexity Iterative Multiuser Detection for DS-CDMA
Wireless Personal Communications: An International Journal
VLSI Architectural design tradeoffs for sliding-window Log-MAP decoders
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Memory sub-banking scheme for high throughput MAP-based SISO decoders
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
EURASIP Journal on Wireless Communications and Networking - Special issue on advanced signal processing algorithms for wireless communications
QoS- based JPEG images transmission protocol for wireless CDMA communication systems
WMuNeP '05 Proceedings of the 1st ACM workshop on Wireless multimedia networking and performance modeling
Journal of VLSI Signal Processing Systems
Low complexity receiver structures for space-time coded multiple-access systems
EURASIP Journal on Applied Signal Processing
Joint source-channel decoding of variable-length codes with soft information: a survey
EURASIP Journal on Applied Signal Processing
High-speed recursion architectures for MAP-based turbo decoders
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A new constructive approximation in log-map turbo decoder
EHAC'08 Proceedings of the 7th WSEAS International Conference on Electronics, Hardware, Wireless and Optical Communications
A Novel Single Carrier Space-Time Block-Coded CDMA System with Iterative Receiver
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Dynamic reconfiguration approach for high speed turbo decoding using circular rings
Proceedings of the 19th ACM Great Lakes symposium on VLSI
On optimal and near-optimal turbo decoding using generalized max* operator
IEEE Communications Letters
Iterative decoding using optimum soft input - hard output module
IEEE Transactions on Communications
Distribution of L-values in gray-mapped M2-QAM: closed-form approximations and applications
IEEE Transactions on Communications
Low-power memory-reduced traceback MAP decoding for double-binary convolutional turbo decoder
IEEE Transactions on Circuits and Systems Part I: Regular Papers - Special issue on ISCAS2008
Wireless Personal Communications: An International Journal
Improving the performance of SM-MIMO/BICM-ID systems with LLR distribution matching
IEEE Transactions on Communications
Partial iterative decoding for binary turbo codes via cross-entropy based bit selection
IEEE Transactions on Communications
A reconfigurable processor for forward error correction
ARCS'07 Proceedings of the 20th international conference on Architecture of computing systems
Exploiting UEP in QAM-based BICM: interleaver and code design
IEEE Transactions on Communications
Boosted-OFDM scheme for 802.11n WLANs
Proceedings of the 6th International Wireless Communications and Mobile Computing Conference
Braided convolutional codes: a new class of turbo-like codes
IEEE Transactions on Information Theory
Detect-and-forward in two-hop relay channels: a metrics-based analysis
IEEE Transactions on Communications
Iterative multisymbol noncoherent reception of coded CPFSK
IEEE Transactions on Communications
On chip interconnects for multiprocessor turbo decoding architectures
Microprocessors & Microsystems
Area-efficient high-throughput MAP decoder architectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Study of energy and performance of space-time decoding systems in concatenation with turbo decoding
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Highly-parallel decoding architectures for convolutional turbo codes
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A Flexible LDPC/Turbo Decoder Architecture
Journal of Signal Processing Systems
A 65nm VLSI implementation for the LTE turbo decoder
Proceedings of the 24th symposium on Integrated circuits and systems design
A new low latency parallel turbo decoder employing parallel phase decoding method
ICA3PP'12 Proceedings of the 12th international conference on Algorithms and Architectures for Parallel Processing - Volume Part II
Novel Generalized max* Approximation Method for Simplified Decoding of Turbo and TTCM Codes
Wireless Personal Communications: An International Journal
A low-complexity turbo decoder architecture for energy-efficient wireless sensor networks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Reconfigurable Parallel Turbo Decoder Design for Multiple High-Mobility 4G Systems
Journal of Signal Processing Systems
| Hi-index | 0.13 |
An intuitive shortcut to understanding the maximum a posteriori (MAP) decoder is presented based on an approximation. This is shown to correspond to a dual-maxima computation combined with forward and backward recursions of Viterbi algorithm computations. The logarithmic version of the MAP algorithm can similarly be reduced to the same form by applying the same approximation. Conversely, if a correction term is added to the approximation, the exact MAP algorithm is recovered. It is also shown how the MAP decoder memory can be drastically reduced at the cost of a modest increase in processing speed