Design Automation for Embedded Systems
MetaCore: an application specific DSP development system
DAC '98 Proceedings of the 35th annual Design Automation Conference
EXPRESSION: a language for architecture exploration through compiler/simulator retargetability
DATE '99 Proceedings of the conference on Design, automation and test in Europe
A methodology for accurate performance evaluation in architecture exploration
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
LISA—machine description language for cycle-accurate models of programmable DSP architectures
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
PEAS-III: An ASIP Design Environment
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Application specific forwarding network and instruction encoding for multi-pipe ASIPs
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
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In this paper, JPEG encoder application, one of the DSP applications, was implemented using the ASIP development system: PEAS-III. Instructions for JPEG encoder, such as DCT instruction, and butterfly instructions, were added to the initial design. Area, performance, and execution cycles of processors were calculated using generated HDL description, compiler, and assembler by PEAS-III. From experimental results, 12 architectures is designed in 160 hours, and designer can select an optimal architecture that satisfies design constraints considering hardware cost, clock frequency and execution cycles.