A case study of multi-threading in the embedded space

  • Authors:

  • Greg Hoover;Forrest Brewer;Timothy Sherwood

  • Affiliations:

  • University of California, Santa Barbara, California;University of California, Santa Barbara, California;University of California, Santa Barbara, California

  • Venue:
  • CASES '06 Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems
  • Year:
  • 2006

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Abstract

The continuing miniaturization of technology coupled with wireless networks has made it feasible to physically embed sensor network systems into the environment. Sensor net processors are tasked with the job of handling a disparate set of interrupt driven activity, from networks to timers to the sensors themselves.In this paper,we demonstrate the advantages of a tiny multi-threaded microcontroller design which targets embedded applications that need to respond to events at high speed. While multi-threading is typically used to improve resource utilization, in the embedded space it can provide zero-cycle context switching and interrupt service threads (IST), enabling complex programmable control in latency constrained environments. To explore the advantages of multi-threading on these embedded problems, we have implemented in hardware a family of controllers supporting eight dynamically interleaved threads and executing the AVR instruction set. This allows us to carefully quantify the effects of threading on interrupt latency, code size, overall processor throughput, cycle time, and design area for complete designs with different numbers of threads.