A collision model for randomized routing in fat-tree networks

Authors:
Volker Strumpen;Arvind Krishnamurthy
Affiliations:
Computer Science and Artificial Intelligence Laboratory, Massachusetts Institute of Technology, USA;Department of Computer Science, Yale University, USA
Venue:
Journal of Parallel and Distributed Computing
Year:
2005

Citing 15
Cited 2

Amortized efficiency of list update and paging rules

Communications of the ACM
Fat-trees: universal networks for hardware-efficient supercomputing

IEEE Transactions on Computers
Modeling a circuit switched multiprocessor interconnect

SIGMETRICS '90 Proceedings of the 1990 ACM SIGMETRICS conference on Measurement and modeling of computer systems
Simple algorithms for routing on butterfly networks with bounded queues

STOC '92 Proceedings of the twenty-fourth annual ACM symposium on Theory of computing
Performance Analysis of Multistage Interconnection Network Configurations and Operations

IEEE Transactions on Computers
Performance analysis of a synchronous, circuit-switched interconnection cached network

ICS '94 Proceedings of the 8th international conference on Supercomputing
Randomized routing and sorting on fixed-connection networks

Journal of Algorithms
Randomized algorithms

Randomized algorithms
The network architecture of the connection machine CM-5

Journal of Parallel and Distributed Computing
Randomized protocols for low-congestion circuit routing in multistage interconnection networks

STOC '98 Proceedings of the thirtieth annual ACM symposium on Theory of computing
Baring It All to Software: Raw Machines

Computer
Processor-memory interconnections for multiprocessors

ISCA '79 Proceedings of the 6th annual symposium on Computer architecture
The Performance of Multistage Interconnection Networks for Multiprocessors

IEEE Transactions on Computers
Randomized routing on fat-tress

SFCS '85 Proceedings of the 26th Annual Symposium on Foundations of Computer Science
Increasing the size of a network by a constant factor can increase performance by more than a constant factor

SFCS '88 Proceedings of the 29th Annual Symposium on Foundations of Computer Science

The fat-stack and universal routing in interconnection networks

Journal of Parallel and Distributed Computing - Special issue: 18th International parallel and distributed processing symposium
A low-power fat tree-based optical network-on-chip for multiprocessor system-on-chip

Proceedings of the Conference on Design, Automation and Test in Europe

Quantified Score

Hi-index	0.00

Visualization

Abstract

We present a proof that in a model of a fat-tree network with n processing nodes m=0. Unlike previously applied proof methods, we use an approximating model for the collision behavior of the network amenable to concise yet simple theoretical analysis. We justify the accuracy of the approximation by means of behavioral simulations based on a gate-level implementation of a fat-tree network.