Power analysis of embedded software: a first step towards software power minimization
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
Power analysis and minimization techniques for embedded DSP software
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
The design and use of simplepower: a cycle-accurate energy estimation tool
Proceedings of the 37th Annual Design Automation Conference
Wattch: a framework for architectural-level power analysis and optimizations
Proceedings of the 27th annual international symposium on Computer architecture
Cycle-accurate energy consumption measurement and analysis: case study of ARM7TDMI
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Run-time power estimation in high performance microprocessors
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Cycle-accurate energy measurement and characterization with a case study of the ARM7TDMI
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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This paper addresses a problem of modeling the power consumption of advanced off-the-shelf processors. Unlike existing methods for processor power estimation, where the internal information of processor architecture such as activation of specfic modules such as pipeline stages, etc.) is available via simulation or runtime counters, power modeling method presented in this paper is to estimate the power consumption of complex off-the-shelf RISC processor without such a detailed information, only based on the information of the processor I/O signals (i.e memory access). To tackle this problem, we propose a new power model, called IPI(Instruction-Prefetch Interval) power model. The IPI represents the time interval between two consecutive instruction prefetchs. Our model has two major advantages. First, this model can consider prefetch mechanism. Most of advanced RISC processors have prefetch mechanism which makes processor power estimation difficult. IPI model is the first approach to model prefetch mechanism in processor power estimation. Second, this model can provide power variation in time and therefore it overcomes the limitation of previous work, such as instruction-level energy model. Experiments show that the proposed model yields 96% accuracy on theaverage in case of ARM1136JF-S test chip.