Communication and concurrency
The design cube: a new model for VHDL designflow representation
EURO-DAC '92 Proceedings of the conference on European design automation
HML, a novel hardware description language and its translation to VHDL
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Models of computation for embedded system design
System-level synthesis
Time, clocks, and the ordering of events in a distributed system
Communications of the ACM
Communicating sequential processes
Communications of the ACM
The usage of stochastic processes in embedded system specifications
Proceedings of the ninth international symposium on Hardware/software codesign
The Haskell: The Craft of Functional Programming
The Haskell: The Craft of Functional Programming
The Definition of Standard ML
First version of a data flow procedure language
Programming Symposium, Proceedings Colloque sur la Programmation
Abstract State Machines: A Method for High-Level System Design and Analysis
Abstract State Machines: A Method for High-Level System Design and Analysis
Modeling Embedded Systems and SoC's: Concurrency and Time in Models of Computation
Modeling Embedded Systems and SoC's: Concurrency and Time in Models of Computation
Toward a semantic anchoring infrastructure for domain-specific modeling languages
Proceedings of the 5th ACM international conference on Embedded software
Computer automated multi-paradigm modelling for analysis and design of traffic networks
WSC '04 Proceedings of the 36th conference on Winter simulation
Metamodeling-rapid design and evolution of domain-specific modeling environments
ECBS'99 Proceedings of the 1999 IEEE conference on Engineering of computer-based systems
A framework for comparing models of computation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
System modeling and transformational design refinement in ForSyDe [formal system design]
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Provably correct on-chip communication: A formal approach to automatic protocol converter synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
MMV: a metamodeling based microprocessor validation environment
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
| Hi-index | 0.00 |
We present the EWD design environment and methodology, a modeling and simulation framework suited for complex and heterogeneous embedded systems with varying degrees of expressibility and modeling fidelity. This environment promotes the use of multiple models of computation (MoCs) to support heterogeneity and metamodeling for conformance tests of syntactic and static semantics during the process of modeling. Therefore, EWD is a multiple MoC modeling and simulation framework that ensures conformance of the MoC formalisms during model construction using a metamodeling approach. In addition, EWD provides a suite of translation tools that generate executable models for two simulation frameworks to demonstrate its language-independent modeling framework. The EWD methodology uses the Generic Modeling Environment for customization of the MoC-specific modeling syntax into a visual representation. To embed the execution semantics of the MoCs into the models, we have built parsing and translation tools that leverage an XML-based interoperability language. This interoperability language is then translated into executable Standard ML or Haskell models that can also be analyzed by existing simulation frameworks such as SML-Sys or ForSyDe. In summary, EWD is a metamodeling driven multitarget design environment with multi-MoC modeling capability.