A time-predictable system initialization design for huge-capacity flash-memory storage systems
CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
Storage architecture and software support for SLC/MLC combined flash memory
Proceedings of the 2009 ACM symposium on Applied Computing
FRA: a flash-aware redundancy array of flash storage devices
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Superblock FTL: A superblock-based flash translation layer with a hybrid address translation scheme
ACM Transactions on Embedded Computing Systems (TECS)
An adaptive flash translation layer for high-performance storage systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - Special issue on the 2009 ACM/IEEE international symposium on networks-on-chip
Reducing computation overhead of flash translation layer with hash
ACACOS'10 Proceedings of the 9th WSEAS international conference on Applied computer and applied computational science
KAST: K-Associative Sector Translation for NAND flash memory in real-time systems
Proceedings of the Conference on Design, Automation and Test in Europe
An endurance solution for solid state drives with cache
Journal of Systems and Software
NAND flash memory-based hybrid file system for high I/O performance
Journal of Parallel and Distributed Computing
A multi-controller design for solid-state drives
Proceedings of the 2012 ACM Research in Applied Computation Symposium
A multi-controller architecture for high-performance solid-state drives
ACM SIGAPP Applied Computing Review
Triple-A: a Non-SSD based autonomic all-flash array for high performance storage systems
Proceedings of the 19th international conference on Architectural support for programming languages and operating systems
| Hi-index | 0.00 |
In this paper, we propose a novel FTL (Flash Translation Layer) architecture for NAND flash based applications such as mp3 players, DSCs (Digital still camera) and SSDs (Solid-state disk). Even though the basic function of an FTL is to translate a logical sector address to a physical sector address in flash memory, its efficient algorithms have a significant impact on performance as well as lifetime. After we categorize dominant parameters that affect performance and endurance, we explore the design space of the FTL architecture based on a diverse workload analysis. With our FTL architectural framework, we can decide which configuration of FTL mapping parameters yields the best performance depending on each NAND flash application behavior.