PLAN: a packet language for active networks
ICFP '98 Proceedings of the third ACM SIGPLAN international conference on Functional programming
ACM Transactions on Computer Systems (TOCS)
Chord: A scalable peer-to-peer lookup service for internet applications
Proceedings of the 2001 conference on Applications, technologies, architectures, and protocols for computer communications
Building a robust software-based router using network processors
SOSP '01 Proceedings of the eighteenth ACM symposium on Operating systems principles
VERA: an extensible router architecture
Computer Networks: The International Journal of Computer and Telecommunications Networking - Special issue on programmable networks
Globally Distributed Content Delivery
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In VINI veritas: realistic and controlled network experimentation
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NSDI'06 Proceedings of the 3rd conference on Networked Systems Design & Implementation - Volume 3
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Fairness issues in software virtual routers
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High-Speed Matching of Vulnerability Signatures
RAID '08 Proceedings of the 11th international symposium on Recent Advances in Intrusion Detection
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Proceedings of the 4th ACM/IEEE Symposium on Architectures for Networking and Communications Systems
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Flow processing and the rise of commodity network hardware
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Implementation of end-to-end abstractions in a network service architecture
CoNEXT '08 Proceedings of the 2008 ACM CoNEXT Conference
Towards high performance virtual routers on commodity hardware
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Cabernet: connectivity architecture for better network services
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PdP: parallelizing data plane in virtual network substrate
Proceedings of the 1st ACM workshop on Virtualized infrastructure systems and architectures
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Scalable network virtualization using FPGAs
Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays
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ICC'09 Proceedings of the 2009 IEEE international conference on Communications
SwitchBlade: a platform for rapid deployment of network protocols on programmable hardware
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PacketShader: a GPU-accelerated software router
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Customizing virtual networks with partial FPGA reconfiguration
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IP routing processing with graphic processors
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Fair multithreading on packet processors for scalable network virtualization
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FIS'2009 Proceedings of the Second Future internet conference on Future internet
Implementing URL-based forwarding on a network processor-based router platform
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OpenGate: Towards an open network services gateway
Computer Communications
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OSDI'10 Proceedings of the 9th USENIX conference on Operating systems design and implementation
Customizing virtual networks with partial FPGA reconfiguration
ACM SIGCOMM Computer Communication Review
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Forty data communications research questions
ACM SIGCOMM Computer Communication Review
ReClick - A Modular Dataplane Design Framework for FPGA-Based Network Virtualization
Proceedings of the 2011 ACM/IEEE Seventh Symposium on Architectures for Networking and Communications Systems
Fast Path Performance of Packet Cache Router Using Multi-core Network Processor
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In recent years, overlay networks have become an important vehicle for delivering Internet applications. Overlay network nodes are typically implemented using general purpose servers or clusters. We investigate the performance benefits of more integrated architectures, combining general-purpose servers with high performance Network Processor (NP) subsystems. We focus on PlanetLab as our experimental context and report on the design and evaluation of an experimental PlanetLab platform capable of much higher levels of performance than typical system configurations. To make it easier for users to port applications, the system supports a fast path/slow path application structure that facilitates the mapping of the most performance-critical parts of an application onto an NP subsystem, while allowing the more complex control and exception-handling to be implemented within the programmer-friendly environment provided by conventional servers. We report on implementations of two sample applications, an IPv4 router, and a forwarding application for the Internet Indirection Infrastructure. We demonstrate an 80x improvement in packet processing rates and comparable reductions in latency.