Adaptive filter theory (2nd ed.)
Adaptive filter theory (2nd ed.)
Code generation for compiled bit-true simulation for DSP application
Proceedings of the 11th international symposium on System synthesis
Reuse methodology manual: for system-on-a-chip designs
Reuse methodology manual: for system-on-a-chip designs
Discrete-time signal processing (2nd ed.)
Discrete-time signal processing (2nd ed.)
FRIDGE: a fixed-point design and simulation environment
Proceedings of the conference on Design, automation and test in Europe
Reuse Techniques for VLSI Design
Reuse Techniques for VLSI Design
Automatic Conversion of Floating Point MATLAB Programs into Fixed Point FPGA Based Hardware Design
FCCM '03 Proceedings of the 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
An algorithm for converting floating-point computations to fixed-point in MATLAB based FPGA design
Proceedings of the 41st annual Design Automation Conference
An Algorithm for Trading Off Quantization Error with Hardware Resources for MATLAB-Based FPGA Design
IEEE Transactions on Computers
Floating-to-fixed-point conversion for digital signal processors
EURASIP Journal on Applied Signal Processing
Program transformation for numerical precision
Proceedings of the 2009 ACM SIGPLAN workshop on Partial evaluation and program manipulation
Accuracy constraint determination in fixed-point system design
EURASIP Journal on Embedded Systems - Reconfigurable Computing and Hardware/Software Codesign
Enhancing the implementation of mathematical formulas for fixed-point and floating-point arithmetics
Formal Methods in System Design
Architectural synthesis of fixed-point DSP datapaths using FPGAs
International Journal of Reconfigurable Computing - Special issue on selected papers from ReConFig 2008
Accuracy evaluation of fixed-point based LMS algorithm
Digital Signal Processing
Exploiting finite precision information to guide data-flow mapping
Proceedings of the 47th Design Automation Conference
Test Case Generation for Adequacy of Floating-point to Fixed-point Conversion
Electronic Notes in Theoretical Computer Science (ENTCS)
Finite precision processing in wireless applications
Proceedings of the Conference on Design, Automation and Test in Europe
SQNR estimation of fixed-point DSP algorithms
EURASIP Journal on Advances in Signal Processing
EURASIP Journal on Advances in Signal Processing - Special issue on quantization of VLSI digital signal processing systems
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To reduce the gap between the VLSI technology capability and the designer productivity, design reuse based on IP (intellectual properties) is commonly used. In terms of arithmetic accuracy, the generated architecture can generally only be configured through the input and output word lengths. In this paper, a new kind of method to optimize fixed-point arithmetic IP has been proposed. The architecture cost is minimized under accuracy constraints defined by the user. Our approach allows exploring the fixed-point search space and the algorithm-level search space to select the optimized structure and fixed-point specification. To significantly reduce the optimization and design times, analytical models are used for the fixed-point optimization process.