Power macromodeling for high level power estimation
DAC '97 Proceedings of the 34th annual Design Automation Conference
Code generation for compiled bit-true simulation for DSP application
Proceedings of the 11th international symposium on System synthesis
Discrete-time signal processing (2nd ed.)
Discrete-time signal processing (2nd ed.)
Bidwidth analysis with application to silicon compilation
PLDI '00 Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation
Precision and error analysis of MATLAB applications during automated hardware synthesis for FPGAs
Proceedings of the conference on Design, automation and test in Europe
FRIDGE: a fixed-point design and simulation environment
Proceedings of the conference on Design, automation and test in Europe
A system for synthesizing optimized FPGA hardware from MATLAB
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Parallelizing Applications into Silicon
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Précis: A Design-Time Precision Analysis Tool
FCCM '02 Proceedings of the 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
FCCM '02 Proceedings of the 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Dynamically Exploiting Narrow Width Operands to Improve Processor Power and Performance
HPCA '99 Proceedings of the 5th International Symposium on High Performance Computer Architecture
Profiling for Input Predictable Threads
ICCD '98 Proceedings of the International Conference on Computer Design
Perturbation Analysis for Word-length Optimization
FCCM '03 Proceedings of the 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Automatic Conversion of Floating Point MATLAB Programs into Fixed Point FPGA Based Hardware Design
FCCM '03 Proceedings of the 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Automated fixed-point data-type optimization tool for signal processing and communication systems
Proceedings of the 41st annual Design Automation Conference
An algorithm for converting floating-point computations to fixed-point in MATLAB based FPGA design
Proceedings of the 41st annual Design Automation Conference
The Multiple Wordlength Paradigm
FCCM '01 Proceedings of the the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Floating-point to fixed-point conversion
Floating-point to fixed-point conversion
Evaluation of branch-prediction methods on traces from commercial applications
IBM Journal of Research and Development
Comments on “Finite word-length effects of pipelinedrecursive digital filters” [and reply]
IEEE Transactions on Signal Processing
Simulation-based word-length optimization method for fixed-pointdigital signal processing systems
IEEE Transactions on Signal Processing
IEEE Transactions on Information Theory
Combined word-length optimization and high-level synthesis of digital signal processing systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Fixed-point configurable hardware components
EURASIP Journal on Embedded Systems
Symbolic noise analysis approach to computational hardware optimization
Proceedings of the 45th annual Design Automation Conference
Quantization Error and Accuracy-Performance Tradeoffs for Embedded Data Mining Workloads
ICCS '07 Proceedings of the 7th international conference on Computational Science, Part III: ICCS 2007
Fast trade-off evaluation for digital signal processing systems during wordlength optimization
Proceedings of the 2009 International Conference on Computer-Aided Design
EURASIP Journal on Embedded Systems
Enriching MATLAB with aspect-oriented features for developing embedded systems
Journal of Systems Architecture: the EUROMICRO Journal
| Hi-index | 14.98 |
Most practical FPGA designs of digital signal processing (DSP) applications are limited to fixed-point arithmetic owing to the cost and complexity of floating-point hardware. While mapping DSP applications onto FPGAs, a DSP algorithm designer must determine the dynamic range and desired precision of input, intermediate, and output signals in a design implementation. The first step in a MATLAB-based hardware design flow is the conversion of the floating-point MATLAB code into a fixed-point version using "quantizers驴 from the Filter Design and Analysis (FDA) Toolbox for MATLAB. This paper describes an approach to automate the conversion of floating-point MATLAB programs into fixed-point MATLAB programs, for mapping to FPGAs by profiling the expected inputs to estimate errors. Our algorithm attempts to minimize the hardware resources while constraining the quantization error within a specified limit. Experimental results on five MATLAB benchmarks are reported for Xilinx Virtex II FPGAs.