Code generation for compiled bit-true simulation for DSP application
Proceedings of the 11th international symposium on System synthesis
FRIDGE: a fixed-point design and simulation environment
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the 38th annual Design Automation Conference
Handbook of Applied Cryptography
Handbook of Applied Cryptography
WCDMA: Towards IP Mobility and Mobile Internet
WCDMA: Towards IP Mobility and Mobile Internet
The Art of Computer Programming, 2nd Ed. (Addison-Wesley Series in Computer Science and Information
The Art of Computer Programming, 2nd Ed. (Addison-Wesley Series in Computer Science and Information
A Tutorial on MPEG/Audio Compression
IEEE MultiMedia
Perturbation Analysis for Word-length Optimization
FCCM '03 Proceedings of the 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Automated Floating-Point to Fixed-Point Conversion with the Fixify Environment
RSP '05 Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping
Fixed-point configurable hardware components
EURASIP Journal on Embedded Systems
Floating-to-fixed-point conversion for digital signal processors
EURASIP Journal on Applied Signal Processing
Simulation and emulation of MIMO wireless baseband transceivers
EURASIP Journal on Wireless Communications and Networking - Special issue on simulators and experimental testbeds design and development for wireless networks
Test Case Generation for Adequacy of Floating-point to Fixed-point Conversion
Electronic Notes in Theoretical Computer Science (ENTCS)
Word-Length Aware DSP Hardware Design Flow Based on High-Level Synthesis
Journal of Signal Processing Systems
EURASIP Journal on Embedded Systems
Proceedings of the great lakes symposium on VLSI
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Most of digital signal processing applications are specified and designed with floatingpoint arithmetic but are finally implemented using fixed-point architectures. Thus, the design flow requires a floating-point to fixed-point conversion stage which optimizes the implementation cost under execution time and accuracy constraints. This accuracy constraint is linked to the application performances and the determination of this constraint is one of the key issues of the conversion process. In this paper, a method is proposed to determine the accuracy constraint from the application performance. The fixed-point system is modeled with an infinite precision version of the system and a single noise source located at the system output. Then, an iterative approach for optimizing the fixed-point specification under the application performance constraint is defined and detailed. Finally the efficiency of our approach is demonstrated by experiments on an MP3 encoder.