Hardware Synthesis from Term Rewriting Systems
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Proceedings of the 10th International Workshop on Java Technologies for Real-time and Embedded Systems
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This paper presents BLUEJEP, a novel Java embedded processor, developed using the relatively new Bluespec System Verilog (BSV) environment. The starting point for BLUEJEP is a micro-programmed, pipelined, Java-optimized processor (JOP), written in VHDL. Our BSV solution features a number of design choices, including a longer pipeline and speculative execution, that make the design more flexible, maintainable and high-performance. BLUEJEP also appears to be an excellent platform for exploring a number of Java specific techniques, both in hardware (bytecode folding, memory management, and caching strategies) and in software (runtime environment, bytecode optimizations). Tests and measurements were carried out both through simulation and on implementations running on a Xilinx FPGA.