Hardware Synthesis from Term Rewriting Systems

High-level specification and efficient implementation of pipelined circuits

Proceedings of the 2001 Asia and South Pacific Design Automation Conference

High-level automatic pipelining for sequential circuits

Proceedings of the 14th international symposium on Systems synthesis

Synthesis of operation-centric hardware descriptions

Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design

A Higher-Level Language for Hardware Synthesis

CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods

High Level Synthesis from Sim-nML Processor Models

VLSID '03 Proceedings of the 16th International Conference on VLSI Design

Modeling and prototyping dynamically reconfigurable systems for efficient computation of dynamic programming methods by rewriting-logic

SBCCI '04 Proceedings of the 17th symposium on Integrated circuits and system design

Prototyping time- and space-efficient computations of algebraic operations over dynamically reconfigurable systems modeled by rewriting-logic

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Tackling an abstraction gap: co-simulating SystemC DE with bluespec ESL

Proceedings of the conference on Design, automation and test in Europe

BlueJEP: a flexible and high-performance Java embedded processor

JTRES '07 Proceedings of the 5th international workshop on Java technologies for real-time and embedded systems

Automatic Verification of Arithmetic Circuits in RTL Using Stepwise Refinement of Term Rewriting Systems

IEEE Transactions on Computers

Static elaboration of recursion for concurrent software

PEPM '08 Proceedings of the 2008 ACM SIGPLAN symposium on Partial evaluation and semantics-based program manipulation

VHDL vs. Bluespec system verilog: a case study on a Java embedded architecture

Proceedings of the 2008 ACM symposium on Applied computing

Structural integrity: safety in miniature technology

ACM SIGBED Review - Special issue on the RTSS forum on deeply embedded real-time computing

Synthesizing synchronous elastic flow networks

Proceedings of the conference on Design, automation and test in Europe

Flexible hardware-software cooperation system with HwModule board and co-design framework by ET

ACACOS'08 Proceedings of the 7th WSEAS International Conference on Applied Computer and Applied Computational Science

Verifying Compiler Based Refinement of BluespecTM Specifications Using the SPIN Model Checker

SPIN '08 Proceedings of the 15th international workshop on Model Checking Software

A monadic approach to automated reasoning for Bluespec SystemVerilog

Innovations in Systems and Software Engineering

Hardware synthesis of recursive functions through partial stream rewriting

Proceedings of the 49th Annual Design Automation Conference

Java bytecode to hardware made easy with bluespec system verilog

Proceedings of the 10th International Workshop on Java Technologies for Real-time and Embedded Systems