Easily Testable Cellular Realizations for the (Exactly P)-out-of n and (p or More)-out-of n Logic Functions

Authors:
S. M. Reddy;J. R. Wilson
Affiliations:
Department of Electrical Engineering, University of Iowa;-
Venue:
IEEE Transactions on Computers
Year:
1974

Citing 3
Cited 2

Derivation of Minimum Test Sets for Unate Logical Circuits

IEEE Transactions on Computers
Easily Testable Realizations ror Logic Functions

IEEE Transactions on Computers
Derivation of Minimal Test Sets for Monotonic Logic Circuits

IEEE Transactions on Computers

A New Design Method for m-Out-of-n TSC Checkers

IEEE Transactions on Computers
Design of Self-Checking MOS-LSI Circuits: Application to a Four-Bit Microprocessor

IEEE Transactions on Computers

Quantified Score

Hi-index	14.99

Visualization

Abstract

Networks to realize all n-variable symmetric threshold functions and elementary symmetric functions are given. It is also shown that only 2n test inputs are necessary and sufficient to test any number of faults in these networks.