A New Approach to the Fault Location of Combinational Circuits
IEEE Transactions on Computers
A Procedure for Selecting Diagnostic Tests
IEEE Transactions on Computers
Fault Testing and Diagnosis in Combinational Digital Circuits
IEEE Transactions on Computers
Fault Detection in Fanout-Free Combinational Networks
IEEE Transactions on Computers
Fault Equivalence in Combinational Logic Networks
IEEE Transactions on Computers
A distinguishability criterion for selecting efficient diagnostic tests
AFIPS '68 (Spring) Proceedings of the April 30--May 2, 1968, spring joint computer conference
Application of Information Theory to Sequential Fault Diagnosis
IEEE Transactions on Computers
Diagnosis of Intermittent Faults in Combinational Networks
IEEE Transactions on Computers
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The problem considered in this paper is that of generating sequential decision trees (SDT's) for fault diagnosis in digital combinational networks. Since in most applications of the decision tree the final conclusion will be that the network is failure-free, we are interested mainly in decision trees containing minimal fault detection paths. Such a procedure will reduce the cost of verifying the proper operation of the network.