IEEE Transactions on Computers
IEEE Transactions on Computers
Synthesis of Generalized Parallel Counters
IEEE Transactions on Computers
A Synthesizing Method for Large Parallel Counters with a Network of Smaller Ones
IEEE Transactions on Computers
An Upper Bound for the Synthesis of Generalized Parallel Counters
IEEE Transactions on Computers - Lecture notes in computer science Vol. 174
IEEE Transactions on Computers
IEEE Transactions on Computers
Weighted Realizations of Switching Functions
IEEE Transactions on Computers
A well-mixed function with circuit complexity 5n ± o(n): tightness of the Lachish-Raz-type bounds
TAMC'08 Proceedings of the 5th international conference on Theory and applications of models of computation
A well-mixed function with circuit complexity 5n: Tightness of the Lachish-Raz-type bounds
Theoretical Computer Science
Direct compare of information coded with error-correcting codes
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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A method of determining the number of responders to a search in an associative memory is presented. It is shown that less than one full adder per memory cell is required and that the maximum delay in establishing the count is proportional to n, where n is the log to the base 3 of the number of memory cells.