Voltage-mode driver preemphasis technique for on-chip global buses

Authors:
Liang Zhang;John M. Wilson;Rizwan Bashirullah;Lei Luo;Jian Xu;Paul D. Franzon
Affiliations:
IDT Atlanta Design Center, Duluth, GA and Department of Electrical and Computer Engineering, North Carolina State University, Raleigh, NC;Rambus, Chapel Hill, NC and Department of Electrical and Computer Engineering, North Carolina State University, Raleigh, NC;Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL;Rambus, Chapel Hill, NC and Department of Electrical and Computer Engineering, North Carolina State University, Raleigh, NC;Department of Electrical and Computer Engineering, North Carolina State University, Raleigh, NC;Department of Electrical and Computer Engineering, North Carolina State University, Raleigh, NC
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2007

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Abstract

This paper demonstrates that driver preemphasis technique can be used for on-chip global buses to increase signal channel bandwidth. Compared to conventional repeater insertion techniques, driver preemphasis saves repeater layout complexity and reduces power consumption by 12%-39% for data activity factors above 0.1. A driver circuit architecture using voltage-mode preemphasis technique was tested in 0.18-µm CMOS technology for 10-mm long interconnects at 2 Gb/s.