A comprehensive fault macromodel for opamps
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Fault Modeling and Simulation Using VHDL-AMS
Analog Integrated Circuits and Signal Processing - Special issue: Analog VHDL
Fault Models and Test Generation for OpAmp Circuits—The FFM
Journal of Electronic Testing: Theory and Applications
DFT '01 Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems
Fault Modeling for the Testing of Mixed Integrated Circuits
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
A methodology for fault model development for hierarchical linear systems
ATS '00 Proceedings of the 9th Asian Test Symposium
On-Line BIST for Testing Analog Circuits
ICCD '99 Proceedings of the 1999 IEEE International Conference on Computer Design
Behavioral Fault Modeling and Simulation Using VHDL-AMS to Speed-Up Analog Fault Simulation
Analog Integrated Circuits and Signal Processing
An Operational Amplifier Model for Test Planning at Behavioral Level
VLSID '05 Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
Systematic development of analog circuit structural macromodels through behavioral model decoupling
Proceedings of the 42nd annual Design Automation Conference
Journal of Electronic Testing: Theory and Applications
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This paper proposes a new operational amplifier model for evaluating test strategies at behavioural level. Major modifications on a previously reported model for improving its performance and for allowing reliable fault simulations are presented here. The new model presents a set of very appealing characteristics for behavioural-level fault injection and simulation. The matching between the behavioural-level model and a transistor-level one is evaluated for validating the model. We suggest the use of the model early in the design process, when the schematic of the circuit is not available for the test engineer and only the specifications are given. The model is also useful for evaluating different test alternatives for commercial operational amplifiers or standard cells designed by others vendors. The paper addresses two application examples and shows the usefulness of the model for evaluating test strategies when only the specifications of the circuit are available.