Concurrent error detection in Reed-Solomon encoders and decoders

Authors:
G. C. Cardarilli;S. Pontarelli;M. Re;A. Salsano
Affiliations:
Department of Electronic Engineering, University of Rome "Tor Vergata", Rome, Italy;Department of Electronic Engineering, University of Rome "Tor Vergata", Rome, Italy;Department of Electronic Engineering, University of Rome "Tor Vergata", Rome, Italy;Department of Electronic Engineering, University of Rome "Tor Vergata", Rome, Italy
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2007

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Abstract

Reed-Solomon (RS) codes are widely used to identify and correct errors in transmission and storage systems. When RS codes are used for high reliable systems, the designer should also take into account the occurrence of faults in the encoder and decoder subsystems. In this paper, self-checking RS encoder and decoder architectures are presented. The RS encoder architecture exploits some properties of the arithmetic operations in GF(2m). These properties are related to the parity of the binary representation of the elements of the Galois Field. In the RS decoder, the implicit redundancy of the received codeword, under suitable assumptions explained in this paper, allows implementing concurrent error detection schemes useful for a wide range of different decoding algorithms with no intervention on the decoder architecture. Moreover, performances in terms of area and delay overhead for the proposed circuits are presented.