Electric circuit analysis (3rd ed.)
Electric circuit analysis (3rd ed.)
Parallel Preconditioning with Sparse Approximate Inverses
SIAM Journal on Scientific Computing
Model order-reduction of RC(L) interconnect including variational analysis
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
A linear fractional transform (LFT) based model for interconnect parametric uncertainty
Proceedings of the 41st annual Design Automation Conference
Statistical Timing Analysis Considering Spatial Correlations using a Single Pert-Like Traversal
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Modeling Interconnect Variability Using Efficient Parametric Model Order Reduction
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Modeling Within-Die Spatial Correlation Effects for Process-Design Co-Optimization
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
A sliding window scheme for accurate clock mesh analysis
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Analyzing timing uncertainty in mesh-based clock architectures
Proceedings of the conference on Design, automation and test in Europe: Proceedings
An RLC interconnect model based on fourier analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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We propose a frequency-domain modeling technique with applications on the statistical timing analysis of clock mesh/grid networks. Using transmission lines to model clock mesh edges, we express the means and (co)variances of the sink arrival times as polynomial functions of the arrival times of the input signals and the wire widths of the mesh edges, with up to second order accuracy. Experimental results show that the proposed frequency-domain statistical timing analysis technique is efficient and accurate. The relative mean error is less than 1% and relative variance error less than 3%.