A Mapping Strategy for Parallel Processing
IEEE Transactions on Computers
The SPLASH-2 programs: characterization and methodological considerations
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
Pthreads programming
Segmented bus design for low-power systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Microc/OS-II
Parallel Computer Architecture: A Hardware/Software Approach
Parallel Computer Architecture: A Hardware/Software Approach
IEEE Micro
Adaptive memories for the Quadratic Assignment Problems
Adaptive memories for the Quadratic Assignment Problems
JETTY: Filtering Snoops for Reduced Energy Consumption in SMP Servers
HPCA '01 Proceedings of the 7th International Symposium on High-Performance Computer Architecture
Interconnect-power dissipation in a microprocessor
Proceedings of the 2004 international workshop on System level interconnect prediction
A high performance bus communication architecture through bus splitting
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
RegionScout: Exploiting Coarse Grain Sharing in Snoop-Based Coherence
Proceedings of the 32nd annual international symposium on Computer Architecture
Physical design implementation of segmented buses to reduce communication energy
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Flexible Snooping: Adaptive Forwarding and Filtering of Snoops in Embedded-Ring Multiprocessors
Proceedings of the 33rd annual international symposium on Computer Architecture
Reducing snoop-energy in shared bus-based mpsocs by filtering useless broadcasts
Proceedings of the 17th ACM Great Lakes symposium on VLSI
CATS: cycle accurate transaction-driven simulation with multiple processor simulators
Proceedings of the conference on Design, automation and test in Europe
IEEE Transactions on Computers
Topology exploration for energy efficient intra-tile communication
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
Architectural energy optimization by bus splitting
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Broadcast filtering technique is useful in reducing the snoopenergy consumption of shared bus-based MPSoCs by intelligently avoiding useless coherency-request broadcasts. Since the patterns of coherency-request broadcasts are highly dependent on how concurrent tasks are assigned to multiple processors, a broadcast filtering-aware task assignment is important in achieving a high-level of energy efficiency for MPSoCs with a broadcast filtering support. In this paper, we propose broadcast filtering-aware task assignment techniques for low-power MPSoCs, taking advantage of the patterns of coherency-request broadcasts of given tasks. We first propose a restricted optimal task assignment technique that can be useful only when the number of tasks is equal to the number of processors. Then, we describe a general task assignment heuristic that can be used for the arbitrary number of tasks. Experimental results show that when the number of tasks is equal to the number of processors, the proposed optimal task assignment technique reduces the snoop energy consumption by 13% over naive task assignment cases. For general task sets, the proposed task assignment heuristic reduces the snoop energy consumption by 15% over naive task assignment cases.