Sparse matrix solvers on the GPU: conjugate gradients and multigrid
ACM SIGGRAPH 2003 Papers
Error Control Coding, Second Edition
Error Control Coding, Second Edition
Brook for GPUs: stream computing on graphics hardware
ACM SIGGRAPH 2004 Papers
A Synthesizable IP Core for DVB-S2 LDPC Code Decoding
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Computation on Programmable Graphics Hardware
IEEE Computer Graphics and Applications
The GPU on irregular computing: Performance issues and contributions
CAD-CG '05 Proceedings of the Ninth International Conference on Computer Aided Design and Computer Graphics
Low cost LDPC decoder for DVB-S2
Proceedings of the conference on Design, automation and test in Europe: Designers' forum
Belief Propagation on the GPU for Stereo Vision
CRV '06 Proceedings of the The 3rd Canadian Conference on Computer and Robot Vision
Evolutionary Computing on Consumer Graphics Hardware
IEEE Intelligent Systems
Edge Stream Oriented LDPC Decoding
PDP '08 Proceedings of the 16th Euromicro Conference on Parallel, Distributed and Network-Based Processing (PDP 2008)
Joint (3,k)-regular LDPC code and decoder/encoder design
IEEE Transactions on Signal Processing
Accelerate video decoding with generic GPU
IEEE Transactions on Circuits and Systems for Video Technology
Parallel LDPC Decoding on the Cell/B.E. Processor
HiPEAC '09 Proceedings of the 4th International Conference on High Performance Embedded Architectures and Compilers
Towards automatic program partitioning
Proceedings of the 6th ACM conference on Computing frontiers
How GPUs can outperform ASICs for fast LDPC decoding
Proceedings of the 23rd international conference on Supercomputing
On GPU's viability as a middleware accelerator
Cluster Computing
A GPU accelerated storage system
Proceedings of the 19th ACM International Symposium on High Performance Distributed Computing
Fast decoding for LDPC based distributed video coding
Proceedings of the international conference on Multimedia
Complexity analysis of software defined DVB-T2 physical layer
Analog Integrated Circuits and Signal Processing
Efficient decoding of QC-LDPC codes using GPUs
ICA3PP'11 Proceedings of the 11th international conference on Algorithms and architectures for parallel processing - Volume Part I
Journal of Visual Communication and Image Representation
Tsunami: massively parallel homomorphic hashing on many-core GPUs
Concurrency and Computation: Practice & Experience
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Low-Density Parity-Check (LDPC) codes are powerful error correcting codes (ECC). They have recently been adopted by several data communication standards such as DVB-S2 and WiMax. LDPCs are represented by bipartite graphs, also called Tanner graphs, and their decoding demands very intensive computation. For that reason, VLSI dedicated architectures have been investigated and developed over the last few years. This paper proposes a new approach for LDPC decoding on graphics processing units (GPUs). Efficient data structures and an new algorithm are proposed to represent the Tanner graph and to perform LDPC decoding according to the stream-based computing model. GPUs were programmed to efficiently implement the proposed algorithms by applying data-parallel intensive computing. Experimental results show that GPUs perform LDPC decoding nearly three orders of magnitude faster than modern CPUs. Moreover, they lead to the conclusion that GPUs with their tremendous processing power can be considered as a consistent alternative to state-of-the-art hardware LDPC decoders.